Pulse width modulation (PWM) typically involves comparing an input signal to a single oscillating signal (ramp). This comparison results in an output signal that is a logical high when the input signal exceeds the ramp and a logical low when the ramp exceeds the input signal. The width of the output pulses vary in proportion to the level of the input signal. That is, when the input signal has a high value, it exceeds the ramp signal more frequently and, consequently, the output signal has a high duty cycle. Thus, PWM is commonly used to vary the width of pulses in a periodic signal or power source to control the duty cycle of the periodic signal or power source. However, conventional PWM systems are susceptible to noise and include limitations on a minimum/maximum controllable duty cycle due, in part, to nonlinearities caused by changing the slope of the single ramp signal. In some systems, PWM devices are combined or paralleled. However, the resulting propagation delay caused by offsets and delays of the combined comparators reduces predictability and repeatability between the PWM devices.